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All of our IP has been proven in silicon and is foundry ready. Much of it has been done at most of the main Semiconductor foundries. We fully support the current Foundry Model used in development of all modern day ASICs and ASSPs. See our Partners page for the Foundries of choice for us.
If we don’t have our IP at a specific geometric node or foundry, we can port from the existing nodes we currently support. All of our IP is either in RTL form or hard macros that support standard processes within a fab.
Our Cryptography IP range includes Symmetric Key (AES) as well as Asymmetric Key (Public Key Cryptography), Stream Ciphers (ARC4), Authentication & Hashing (SHA) and Random Number Generation. All IP has been highly optimized for use in SoC designs and proven in Silicon. The encryption algorithms are sufficient for protecting bulk data, data at rest, data in motion and are at the heart of protocols for IPsec and SSL/TLS – the core of IoT confidentiality. The Hashing and Message Authentication Code (MAC) algorithms are used typically to provide data integrity and authentication for these same protocols and for Digital Signature Standards such as FIPS 186. We are able to offer this technology in a very small footprint and supporting some of the highest data rates demanded by the most data intensive IoT operations. Additioinally, the majority of this IP has been used in numerous FIPS 140-2 certified implementations. We have the key supporting documentation to enable you to quickly get your final product certified based on this IP.
Physical Unclonable Functions (PUFs) utilize the random parametric variations in electrical properties of chips to differentiate one chip from another, and are designed to be impervious to duplication or prediction, even by the manufacturer. While these random parametric variations are normal and maintained within process control limits and are impossible to effectively manipulate or eliminate, they can be measured. This enables an electronic device to have a unique, unclonable and inherent identity imparted to it by the nature of how it was manufactured. PUFs are the effective digital fingerprint of the silicon chip in your ASIC, ASSP or FPGA.
Normal variations in metal interconnect geometry or certain transistor characteristics are distinct in each copy of a chip. our PUF generation IP is designed to measure these electrical variations. The ‘quality’ of the bit string produced can be measured against many statistical metrics, but needs to meet three important criteria:
1) the bit string is unique for each chip, and thereby able to distinguish each chip in the population,
2) the bit string is random and therefore difficult or impossible to model and predict by an adversary, and
3) the bit string is stable, i.e., it remains constant for a given chip over time, and under varying environmental conditions such as temperature and voltage swings.
QuantumTrace PUF technology is able to meet these requirements, including passing the NIST 800-22 tests for Cryptographic quality random bit strings. This makes it very suitable for establishing clear part identity or authentication. This forms a solid Trust Foundation upon which many solutions can be developed. PUFs can be used in applications related to security including chip identification, authentication, as device based keys, for remote feature activation/deactivation, and for protecting Intellectual Property (IP). See our Solutions section for just some of the ways to use this IoT game changing technology.
Field Programmable Gate Arrays (FPGAs) are integrated circuits designed to be configured after manufacturing. In contrast to an ASIC or ASSP, FPGAs are more like microprocessors in that you use a hardware description language (HDL – usually VHDL or Verilog) ‘program’ their functionality. But, unlike a microprocessor, FPGAs don’t have a fixed instruction set, they truly are programmable logic components that can be linked together to form a complete functional unit.
They can many times bridge the gap between lower volume, shorter deployment cycle IoT systems that demand a more customized hardware functionality but can’t afford the costs of a full blown ASIC or ASSP development. Or for systems that require significant post deployment flexibility and expected modifications that would not be possible with an ASIC or ASSP. Many modern FPGAs come as System on a Chip (SoC) capable platforms (Examples: Xilinx’s Zynq, Intel/Altera’s SoCs, Microsemi’s SmartFusion SoCs) enabling a one chip solution for many IoT system requirements.
For both our Encryption and PUF technology, we offer FPGA versions. This enables faster time to market and can be used for implementations demanding lower volume or greater post deployment flexibility. They can also be used for prototyping, as a first step toward your ASIC or ASSP goals.